The present disclosure relates to testing chips and, more specifically, to a chip carrier with dual-sided chip access for testing and a method for testing of a chip using such a chip carrier.
Electromigration is a failure mechanism that is associated with metal components of a chip (also referred to herein as an integrated circuit (IC) chip or a die). Specifically, electromigration is a condition in which atoms of a metal component or interconnect (e.g., a wire, a via, a through-substrate via (TSV), etc.) are displaced due to passing current. The condition is accelerated when the metal component is exposed to high temperatures and/or high currents and, over time, this condition can cause cracks (i.e., voids, opens, etc.) in the metal component that result in increased resistance and, ultimately, in failure of the metal component. Typically, the reliability of a metal component on a chip is tested using a chip carrier (e.g., a temporary chip attach (TCA) chip carrier). The chip carrier can have a support surface, wire bond pads on the support surface and input/output (I/O) pins electrically connected to the wire bond pads. A chip can be attached to the support surface and wires that are wire bonded to selected chip carrier wire bond pads can be electrically connected to opposite ends of the metal component in any one of several possible ways including, for example: (1) the wires can be directly electrically connected to the opposite ends of the metal component; (2) the wires can be wire bonded to on-chip wire bond pad that are electrically connected to the opposite ends; or (3) the wires can be electrically connected to probes that are in contact with the opposite ends of the metal component. The I/O pins allow for communication with an off-chip tester. Through these electrical connections, the off-chip tester can stress the metal component and, particularly, can subject the metal component to high temperatures and/or high currents and can test the performance of the metal component (e.g., can determine changes in the resistance of the metal component over time and/or can determine the time to fail (TTF) for the metal component). However, for through-substrate vias (TSVs) this reliability testing technique cannot be used because TSVs have opposite ends on opposite sides (e.g., the top and bottom) of the chip.